Issue with automatic download circuit

As shown in the figure below, it is a reference circuit for 56 in SF32 Series Serial Port Auto-Download Design - SiFli-Wiki v1.0 Documentation.

  1. Shouldn’t the reference voltage of the Mode pin be VDDIO2? Is it inappropriate to directly connect it to 3.3V here?

  2. The input of MT9700 has no input power supply. Should it be connected to the PVDD power supply here?

  3. If the power supply of VDDIO4 is 1.8V, should the VIO of CH343P be connected to 1.8V?