We’re currently encountering a low-power issue: the device has followed the software flow to enter deep sleep/shutdown mode, and the logs show that wireless, display, peripheral buses, sensors, PSRAM, etc., have all been properly shut down. However, the measured sleep current is still higher than expected — averaging around several hundred microamps, which doesn’t look like normal deep sleep current.
What’s even stranger is that the current waveform periodically shows very narrow spikes, each lasting about 50 ms with peak currents reaching several mA. This looks like some retention domain, wake-up source, external sensor periodic sampling, or IO/debug port backfeeding is periodically pulling up the current. But after checking and disabling everything we could think of — display, power, buses, sensors, storage, watchdog, peripheral clocks — we still haven’t pinpointed the source. So we’d like to ask the manufacturer to confirm whether there are any hidden requirements for the final state of the PMU/LDO/wake-up source/GPIO during deep sleep.
Hibernate Low Power Leakage and Periodic Spike Explanation.md (21.6 KB)
Encountered the same problem.
It appears that a 52-series chip is being used, and the current being tested is the total system current.
In hibernate mode, all IOs except the wake-up PINs are in a high-impedance state for the 52-series. There may be several leakage paths:
- The input levels of wake-up PINs PA24~PA27 and PA34~PA44 are not at a definite high or low level and have no pull-up/pull-down configured. It is recommended to configure these IOs as GPIO mode with pull-up or pull-down according to the external circuit before entering hibernate.
- The power supply to the co-packaged PSRAM/NOR is not turned off. After entering hibernate, the co-packaged IOs are also in high impedance. If the co-packaged memory remains powered, leakage will occur. It is recommended to take different measures depending on the chip model to cut off the power to the co-packaged memory.
- When an IO is in high impedance or outputs a high level or is pulled up, external devices connected to it, such as screens or sensors, may also cause leakage even if not enabled. If there is still no improvement after trying the first two points, remove the external devices one by one.
Normally, what is the theoretical minimum current in microamps that Hibernate can achieve?
When properly configured, the 52 chip consumes about 2µA after entering hibernation.
