__ROM_BASE = (((0x003FC000)));
__ROM_SIZE = (60 * 1024);
__ROM2_BASE = (((((((((0x1C010000)) + ((64*1024)) - 1)) + 1)) + ((128*1024)) - 1)) + 1);
__ROM2_SIZE = (512*1024);
__RAM_BASE = (0x203FC000);
__RAM_SIZE = (96*1024)-((2*512));
__DTCM_BASE = (0x203FC000);
__DTCM_SIZE = (16*1024);
__STACK_SIZE = 0x00002000;
__HEAP_SIZE = 0x00000C00;
MEMORY
{
    ROM (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
    RAM (rw) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
    DTCM(rw) : ORIGIN = __DTCM_BASE, LENGTH = __DTCM_SIZE
    ROM2 (rx) : ORIGIN = __ROM2_BASE, LENGTH = __ROM2_SIZE
}
ENTRY(Reset_Handler)
SECTIONS
{
  .text :
  {
    _stext = ABSOLUTE(.);
    KEEP(*(.vectors))
    * (.*l1_ret_text_*)
    * (.*l1_ret_rodata_*)
    *startup_bf0_lcpu.o (.text* .rodata*)
    *bf0_hal_mpi.o (.text* .rodata*)
    *bf0_hal_mpi_ex.o (.text* .rodata*)
    *flash_table.o (.text* .rodata*)
    *bf0_hal_lpaon.o (.text* .rodata*)
    *drv_spi_flash.o (.text* .rodata*)
    *flash.o (.text* .rodata*)
    *system_bf0_ap.o (.text* .rodata*)
    *bf0_hal.o (.text* .rodata*)
    *bf0_hal_rcc.o (.text* .rodata*)
    *.o (.text.rt_wdt_restore)
    *.o (.text.HAL_Get_backup)
    *.o (.text.HAL_LPTIM_GetFreq)
    *.o (.text.HAL_WDT_Init)
    *bf0_pm.o (.text.sifli_light_handler)
    *bf0_pm.o (.text.sifli_deep_handler)
    *bf0_pm.o (.text.sifli_standby_handler)
    *bf0_pm.o (.text.SystemPowerOnModeInit)
    *bf0_pm.o (.text.SystemPowerOnModeGet)
    *bf0_pm.o (.text.BSP_GPIO_Set)
    *bsp_init.o (.text* .rodata*)
    *bsp_lcd_tp.o (.text* .rodata*)
    *bsp_pinmux.o (.text* .rodata*)
    *bsp_power.o (.text* .rodata*)
    *bf0_hal_gpio.o (.text* .rodata*)
    *bf0_hal.o (.text.HAL_Init)
    *.o (.text.HAL_Delay_us)
    *.o (.text.HAL_Delay_us_)
    *.o (.text.HAL_MspInit)
    *bf0_hal_pinmux.o (.text* .rodata*)
    *bf0_pin_const.o (.text* .rodata*)
    *.o (.text.rt_memset)
    KEEP(*(.init))
    KEEP(*(.fini))
    . = ALIGN(4);
    __fsymtab_start = .;
    KEEP(*(FSymTab))
    __fsymtab_end = .;
    . = ALIGN(4);
    __vsymtab_start = .;
    KEEP(*(VSymTab))
    __vsymtab_end = .;
    . = ALIGN(4);
    __rt_utest_tc_tab_start = .;
    KEEP(*(UtestTcTab))
    __rt_utest_tc_tab_end = .;
    . = ALIGN(4);
    __rt_init_start = .;
    KEEP(*(SORT(.rti_fn*)))
    __rt_init_end = .;
    . = ALIGN(4);
    __SerialTranExport_start__ = .;
    KEEP(*(SerialTranExport))
    __SerialTranExport_end__ = .;
    . = ALIGN(4);
    __sifli_reg_start__ = .;
    KEEP(*(SORT(.sifli_reg*)))
    __sifli_reg_end__ = .;
    KEEP(*(.eh_frame*))
    _etext = ABSOLUTE(.);
  } > ROM
  .ARM.extab :
  {
    *(.ARM.extab* .gnu.linkonce.armextab.*)
  } > ROM
  __exidx_start = .;
  .ARM.exidx :
  {
    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
  } > ROM
  __exidx_end = .;
  .copy.table :
  {
    . = ALIGN(4);
    __copy_table_start__ = .;
    LONG (LOADADDR(.dtcm_data))
    LONG (ADDR(.dtcm_data))
    LONG (SIZEOF(.dtcm_data))
    __copy_table_end__ = .;
  } > ROM
  .zero.table :
  {
    . = ALIGN(4);
    __zero_table_start__ = .;
    LONG (__bss_start__)
    LONG (__bss_end__ - __bss_start__)
    LONG (__dtcm_bss_start__)
    LONG (__dtcm_bss_end__ - __dtcm_bss_start__)
    __zero_table_end__ = .;
  } > ROM
  __etext = ALIGN (4);
  .dtcm_data :
  {
    . = ALIGN(4);
    __dtcm_data_start__ = .;
    __ER_DTCM$$RW_start__ = .;
    . = ALIGN(4);
    __dtcm_data_end__ = .;
    __ER_DTCM$$RW_end__ = .;
  } > DTCM AT > ROM
  .data (__etext + SIZEOF(.dtcm_data) - __ROM_BASE + __RAM_BASE) :
  {
    _sdata = ABSOLUTE(.);
    __data_start__ = .;
    __RW_IRAM1_start__ = .;
    *(vtable)
    *(.data)
    *(.data.*)
    *(.l1_ret_data_*)
    . = ALIGN(4);
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP(*(.preinit_array))
    PROVIDE_HIDDEN (__preinit_array_end = .);
    . = ALIGN(4);
    _sinit = ABSOLUTE(.);
    PROVIDE(__ctors_start__ = .);
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP(*(SORT(.ctors.*)))
    KEEP(*(.ctors))
    KEEP(*(SORT(.init_array.*)))
    KEEP(*(.init_array))
    _einit = ABSOLUTE(.);
    PROVIDE_HIDDEN (__init_array_end = .);
    PROVIDE(__ctors_end__ = .);
    . = ALIGN(4);
    PROVIDE(__dtors_start__ = .);
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP(*(SORT(.dtors.*)))
    KEEP(*(.dtors))
    KEEP(*(SORT(.fini_array.*)))
    KEEP(*(.fini_array))
    PROVIDE_HIDDEN (__fini_array_end = .);
    PROVIDE(__dtors_end__ = .);
    KEEP(*(.jcr*))
    . = ALIGN(4);
    __data_end__ = .;
    __RW_IRAM1_end__ = .;
    _edata = ABSOLUTE(.);
  } > RAM AT > ROM
  .stack :
  {
    . = ALIGN(8);
    __StackLimit = .;
    . = . + __STACK_SIZE;
    . = ALIGN(8);
    __StackTop = .;
  } > RAM
  PROVIDE(__stack = __StackTop);
  .heap :
  {
    . = ALIGN(8);
    __end__ = .;
    PROVIDE(end = .);
    . = . + __HEAP_SIZE;
    . = ALIGN(8);
    __HeapLimit = .;
  } > RAM
  .dtcm_bss :
  {
    . = ALIGN(4);
    __dtcm_bss_start__ = .;
    __ER_DTCM$$ZI_start__ = .;
    . = ALIGN(4);
    __dtcm_bss_end__ = .;
    __ER_DTCM$$ZI_end__ = .;
  } > DTCM
  .bss :
  {
    _sbss = ABSOLUTE(.);
    . = ALIGN(4);
    __bss_start__ = .;
    *(.bss)
    *(.bss.*)
    *(COMMON)
    *(.l1_ret_bss_*)
    . = ALIGN(4);
    __bss_end__ = .;
    __bss_end = .;
    _ebss = ABSOLUTE(.);
    __end__ = .;
    PROVIDE(end = .);
  } > RAM AT > RAM
  ASSERT((LOADADDR(.data) | 0x20000000) == ADDR(.data), "not aligned")
  .rom2 :
  {
    *(.text*)
    *(.rodata*)
  } > ROM2
}
