Chip used: SF32LB563UCN26
What is the relationship between the two SWD interfaces on PA28 and PA31 and the SWD interfaces on PB13 and PB15? If used directly as I/O, will it affect the chip’s functionality?
Chip used: SF32LB563UCN26
What is the relationship between the two SWD interfaces on PA28 and PA31 and the SWD interfaces on PB13 and PB15? If used directly as I/O, will it affect the chip’s functionality?
SWD defaults to using PB13 and PB15.
The SWD function on PA28 and PA31 is used for debugging in special scenarios. As long as the IO function is not switched to SWD, they can be used as normal IO, just like other IO pins.