1: Now the screen requires QSPI_CLK to be high level in idle mode, and data sampling on the rising edge. Where can I modify this? The default measurement shows low level idle, rising edge sampling — is the default CPOL=0 CPHA=0? In the code I found the definitions clk_polarity and clk_phase, but modifying them doesn’t seem to take effect.
/*****************************************************************************/
#define QAD_SPI_ITF LCDC_INTF_SPI_DCX_4DATA
static LCDC_InitTypeDef lcdc_int_cfg_qadspi =
{
.lcd_itf = QAD_SPI_ITF, // LCDC_INTF_SPI_NODCX_1DATA
#if defined(LCD_MAX_CLK_FREQ)
.freq = LCD_MAX_CLK_FREQ, // CO5300 RGB565 only supports 50000000, RGB888 supports 60000000
#else
.freq = 50000000, // CO5300 RGB565 only supports 50000000, RGB888 supports 60000000
#endif
//.color_mode = LCDC_PIXEL_FORMAT_RGB565,//LCDC_PIXEL_FORMAT_RGB565,
.color_mode = LCDC_PIXEL_FORMAT_RGB888,
.cfg = {
.spi = {
.clk_polarity = 1, // CPOL: 0 = low idle, 1 = high idle
.clk_phase = 1, // CPHA: 0 = sample on first edge, 1 = sample on second edge
.dummy_clock = 0,
