黄山派，用Sifli_UsartServer.exe工具把串口转成jlink用Ozone调试可以不复位连接上但不能在Ozone软件里面复位。
…开始搞事情，…
image|690x94
开始我以为是官方这种串口转jlink这种链接方式的原因，后面我把jlink线焊出来了（把串口芯片取掉了，然后软件里面配置为SWD），直接用jlink连接MCU SWD口，发现还是一样的问题可以检测到内核但不能通过jlink复位芯片。
image|682x500
我看立创文档说明串口下载的复位方式是通过，下载前串口芯片的RTS脚把LDO拉低来把MCU断电这样来复位芯片的。
有大佬知道这是我哪里操作不对吗？还是本身芯片就是这样的不能通过外界复位（只能断电）。
SEGGER J-Link Commander V6.88c (Compiled Dec 4 2020 18:07:30)
DLL version V6.88c, compiled Dec 4 2020 18:05:56
Connecting to J-Link via USB...O.K.
Firmware: J-Link V9 compiled May 7 2021 16:26:12
Hardware version: V9.70
S/N: 59700618
License(s): RDI, FlashBP, FlashDL, JFlash, GDB
VTref=3.309V
Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: NRF52840_XXAA
Type '?' for selection dialog
Device>?
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "SF32LB52X_NOR" selected.
Connecting to target via SWD
Found SW-DP with ID 0x0BE12477
DPIDR: 0x0BE12477
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x1AEB0015)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FD214. Implementer code: 0x41 (ARM)
Found Cortex-M33 r0p4, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
Security extension: not implemented
CoreSight components:
ROMTbl[0] @ E00FF000
ROMTbl[0][0]: E000E000, CID: B105900D, PID: 001F5132 ???
ROMTbl[0][1]: E0001000, CID: B105900D, PID: 000F5132 DWT
ROMTbl[0][2]: E0002000, CID: B105900D, PID: 000F5132 FPB
ROMTbl[0][3]: E0000000, CID: B105900D, PID: 000F5132 ITM
Cortex-M33 identified.
J-Link>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: SYSRESETREQ has confused core.
Failed to power up DAP
Reset: Using fallback: VECTRESET.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.VECTRESET.
Reset: VECTRESET has confused core.
Reset: Using fallback: Reset pin.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Failed to power up DAP
CPU could not be halted
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Failed to power up DAP
CPU could not be halted
Reset: Failed. Toggling reset pin and trying reset strategy again.
Failed to power up DAP
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: SYSRESETREQ has confused core.
Failed to power up DAP
Reset: Using fallback: VECTRESET.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.VECTRESET.
Reset: VECTRESET has confused core.
Reset: Using fallback: Reset pin.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Failed to power up DAP
CPU could not be halted
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Failed to power up DAP
CPU could not be halted
CPU could not be halted
****** Error: Failed to halt CPU.
J-Link>
首次上电能连接上，发送r复位就连不上了。我在想是不是52的芯片默认SWD的引脚是用来作为串口，我只在APP程序里面设置了将这两个引脚作为SWD，是不是bootload里面没设置作为SWD的原因。
立创·开源SF32LB52模组 | 立创开发板技术文档中心
是的，复位后IO会切换回uart，所以只能通过uartserver连接上。当然用户程序跑起来以后应该可以重新连上swd。
